Oliver Bründler
Enclustra GmbH

Oliver Bründler works for Enclustra in the business unit design services, which supports our global
customers in all areas of FPGA-based system development. He is responsible for projects which have a
broad range of applications such as medical, test & measurement, or aerospace. As a system design
expert, he is primarily in charge of system design and specification, as well as managing the projects and
ensuring successful completion. With over 15 years of experience in the field of programmable logic, he
brings the right wealth of practical experience and expertise to take on the most challenging customer
projects for Enclustra.
Early in his professional career, during his apprenticeship, Oliver Bründler gained familiarity with FPGA
technology. Already then, he knew that this technology is his passion. To follow this passion, he aimed for
a degree in digital microelectronics and started working for Enclustra right after completing his BSc in
electrical engineering at FHNW, one of the leading universities of applied sciences in Switzerland. Instead
of pursuing a formal Master’s degree, he chose to immerse himself in real-world projects and seize
opportunities to learn through hands-on experiences. This approach allowed him to gain in depth
knowledge while actively apply theoretical concepts to solve complex problems for Enclustra and its
2
customers. From 2017 to 2020 Oliver Bründler has decided to work on electronics for particle
accelerators at Paul Scherrer Institute before he returned to Enclustra. Since then, he has an even stronger
focus on system design and technical project management.
Throughout his career he worked on a wide variety of projects, including a diverse spectrum of
technological advancements. Noteworthy among his accomplishments are the development of cuttingedge
devices such as a spectrum analyzer, servo controllers, RF measurement devices, RF control
systems, SDR modems and low-latency video processing chains. Additionally, he plays a pivotal role in the
creation of open-source FPGA libraries through this Open Logic project.
Tuesday, 30 June 2026
3:30 - 4:10 pm
Thursday, 2 July 2026
3:30 - 4:10 pm


