Kleanthis Papachatzopoulos

CAST Inc.

Kleanthis Papachatzopoulos joined CAST, Inc. in 2023, and he is currently working as a Hardware Design Engineer. He is primarily involved in the development and verification of hardware IP network stacks and serial interface controllers.  He has deep knowledge of FPGA and ASIC design flows, and he is experienced in various simulation, verification and hardware testing frameworks.

Kleanthis received the Diploma degree in Electrical and Computer Engineering, and the M.Sc. degree in Hardware-Software Integrated Systems from the University of Patras, Greece, in 2016 and 2018, respectively. He earned a Ph.D. degree from the University of Patras in 2025, while he also co-authored five IEEE Transactions and six conference papers. During 2017 – 2023, he worked as a Researcher in the VLSI Design Laboratory, ECE Dept., University of Patras, and participated in several research projects, relevant to digital implementations of communication and signal processing algorithms.  Furthermore, he led the implementation flow for various digital blocks of a mixed-signal chip for several tapeouts.