Espen is the CEO and founder of the newly established EmLogic and previously also Bitvis, both independent design centres for embedded software and FPGA, - with Bitvis as a leading Nordic company within its field and EmLogic now already well on the way to the same size and position. He graduated from the University of Glasgow (Scotland) in 1987 and has 30 years’ experience with FPGA and ASIC development from Philips Semiconductors in Switzerland and various companies in Norway. During twenty years Espen has had a special interest for methodology cultivation and pragmatic efficiency and quality improvement. 

One result of this interest is the UVVM verification platform that is the #1 VHDL verification methodology and library world-wide, and in fact the fastest growing FPGA verification methodology independent of HDL.

He has given many presentations and keynotes internationally on various technical aspects of FPGA development, including lots of hands-on tutorials and presentations at FPGA-Kongress every year since 2016; - all with a crowded audience and great feedback. He is also giving courses world-wide on how to design and verify FPGAs more efficiently and with a better quality.

During twenty years Espen has had a special interest for methodology cultivation and pragmatic efficiency and quality improvement. One result of this interest is the UVVM verification platform that is currently being used by companies world-wide. 

He has given many presentations and keynotes on various technical aspects of FPGA development. He is also giving courses on how to design and verify FPGAs more efficiently and with a better quality. 'Advanced VHDL Verification – Made Simple ' (3 days) and 'Accelerating FPGA design' (2 days) are both arranged in Germany in cooperation with Trias Mikroelektronik. Espen also had a hands-on tutorial and two presentations at FPGA-Kongress in 2016; - both of them with a crowded audience and great feedback on the interesting technical contents.