Speakers 2020

Dr. Werner Bachhuber

The MathWorks GmbH

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Dr.-Ing. Werner Bachhuber works as an application engineer at MathWorks and is responsible for code generation and verification of ASICs, FPGAs and SoCs, as well as for signal processing and communication technology. During his research and industrial activities he developed ASICs and ASSPs for high data rate telecommunication networks and supported customers in the application of complex FPGA designs. Dr.-Ing. Werner Bachhuber received his doctorate at the Technical University of Munich in the field of integrated circuits.

Alexander Binder

Fachhochschule Oberösterreich

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Alexander Binder is a Hardware and Software Engineering student at the University of Applied Sciences in Upper Austria. He finished his Bachelor of Science degree this summer and has been working with Hardware Simulation and Synthesis Tools since he started at the university back in 2016. He is very interested in the concepts and internals of modern processors and therefore decided to design an own implementation of a RISC-V CPU.

Michael Eckstein

ELEKTRONIKPRAXIS

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Redaktion EP - Vogel Communications Group GmbH & Co. KG

Esam Elashmawi

Lattice Semiconductor

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Esam Elashmawi is Lattice Semiconductor’s Chief Marketing and Strategy Officer. He joined Lattice in September 2018 after serving as Senior Vice President and General Manager at Microsemi Corporation since 2010. Esam brings to the role 30 years of FPGA technology and industry experience. Over the past decade, he has successfully managed and developed solutions and equipment for the datacenter, automotive, defense, communications and industrial markets. He most recently served as Senior Vice President and General Manager at Microsemi Corporation since 2010. Esam previously served as Vice President of Product Development at Actel Corporation, which Microsemi acquired in 2010. Earlier in his career he co-founded SiliconExpert Technologies, a component management software company, which was acquired by Arrow Electronics. Esam holds a Master of Science in Electrical Engineering and a Bachelor of Science in Electrical Engineering from Santa Clara University.

Alexander Flick

PLC2 GmbH

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Alexander develops FPGAs for more than 15 years ranging from logic-only design to Embedded Systems with application specific extensions. He has deployed softcore processors as well as hard-IP ARM controllers in different device families. Since 2020 he holds a trainer position at PLC2. His main focus is on the Xilinx tool chaisn for Arm based programmable SoCx / MPSoCs and the new intelligent acceleration concepts coming with the Xilinx Vitis Development Tools.

Harald Friedrich

NewTec GmbH

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1983 - 1986: Berufsakademie Stuttgart – Studium Elektrotechnik/Nachrichtentechnik

1986 - 1995: Entwicklungsingenieur im Bereich Telekom und Industrie

1995 - 2017: verschiedene Rollen in der Elektronik Distribution in Applikation, Marketing und Management, u.a. für prog.Logik, Functional Safety, MicroProzessoren

seit 2017: freiberuflich selbständig: “Harald Friedrich TecConsult”, u.a. für Fa. NewTec

Stephane Gauthier

Silexica GmbH

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Stephane’s passion for using FPGAs to accelerate compute intensive tasks has led him to be a Product Manager at Silexica. With a career that spans nearly 30 years in engineering, sales and product management across a variety of markets and applications, he is currently focused on helping designers maximize productivity and performance when implementing C/C++ algorithms on FPGAs. Stephane’s presentation will describe how SLX FPGA empowers new and advanced HLS users to be successful in optimizing their designs by providing deep code insights, automatic parallelism detection and fast design space exploration.

Sebastian Gerstl

ELEKTRONIKPRAXIS (Moderator)

Michael Gielda

Antmicro/CHIPS Alliance

Dr. Michael Gude

Cologne Chip AG

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Michael Gude achieved a Diploma and Dr. degree from the University of Aachen (RWTH) in electrical engineering. He was involved in research and development from the early days of microprocessors. Michael is founder and CEO of several technology oriented companies; one of them Cologne Chip AG, which was started in 1995. Already in 1989 Michael used the first FPGAs from Actel. Cologne Chip is well known for telecommunication chips since more than 20 years. Now offering their latest developments, the GateMate FPGA family. Michael holds a bunch of patents all over the world.

Marco Höfle

Avnet Silica

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Marco Höfle, Jahrgang 1978, lebt mit seiner Familie in der Schweiz und ist bei Avnet Silica angestellt. Er betreut Kunden in Süddeutschland, der Schweiz und Österreich. Zu seinen Aufgaben gehören Kundenberatung, kundenspezifische Trainings als auch die Kundenunterstützung bei deren Entwicklung mit Xilinx Produkten. Das Big "X" zieht sich durch seine komplette berufliche Laufbahn, angefangen mit der Diplomarbeit, dem technischen Support bei Xilinx in Dublin, der Entwicklungsleitung in einem Ingenieurbüro und seit Mai 2018 als Embedded Specialist Xilinx SoC bei der Avnet Silica.

Sujith Mathew Iype

Ignitarium

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Sujith Mathew Iype is the Cofounder and CTO of Ignitarium Technology Solutions Pvt Ltd and is responsible for driving innovation and nascent technology adoption at Ignitarium. During his career Sujith has worked as an architect for ASICs and FPGA based systems for consumer electronics and healthcare applications. He was responsible for building a focus for Ignitarium in Artificial Intelligence and targeting them to cost effective hardware platforms.

Rahman Jamal

Industry expert/Consultant

Stanislaw Klinke

EBV Elektronik GmbH & Co. KG

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Graduate engineer, employed for more than 20 years in various positions in the semiconductor industry. He gained his experience as ASIC and FPGA developer while working on projects for consumer and industrial applications. Since 2012 working as Field Application Engineer at EBV Elektronik. Besides various tasks in the field of high-end processing, he focuses especially on projects in the area of machine learning and artificial intelligence.

Eugen Krassin

PLC2

Eugen Krassin

PLC2 GmbH

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Dipl.Ing. Eugen Krassin completed his studies of electrical engineering at the University of Stuttgart. He then worked as an electronics developer for well-known companies before he founded the engineering office PLC2 Eugen Krassin which was renamed PLC2 GmbH in 2007. Dipl.-Ing. Eugen Krassin was established by Xilinx as one of the first ATPs (Authorized Training Provider) in the German-speaking world and is the author of several different training courses and workshops as well as technical articles on the use of FPGAs.

Stefan Krassin

PLC2 GmbH

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Already in the beta phase of the first ZYNQ-7000 SoC generation in 2010, Stefan Krassin trained far more than 500 developers in this area in Europe. He has gained practical experience through many successful customer developments. Furthermore, Stefan Krassin is the first officially certified trainer in Europe for the next generation Zynq UltraScale+ MPSoC.

Patrick Lehmann

PLC2 GmbH

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Mr. Patrick Lehmann studied computer science at Technische Universität Dresden, Germany. He started to teach computer engineering and architecture as a tutor in his 3rd year. Later on he specialized in digital design, FPGA technology, and high speed communications. He shared his gained knowledge in labs, in research articles, and on social platforms. His research focuses on digital design with VHDL as well as the integration of EDA design steps into a Git and web services based development flow.
Mr. Lehmann is one of developers and maintainers of The PoC-Library, a platform and vendor independent open source IP core library. He is also a contributor to the free VHDL simulator GHDL. In 2016, he started an initiative called "Open Source VHDL Group".
Mr. Lehmann is active in the IEEE P1076 "VHDL Analysis and Standardization Group" since 2014. He detailed and wrote major parts of the language changes for the upcoming VHDL revision. In 2017 he became an IEEE Standards Association member and was announced vice-chair of the P1076 working group.
Since June 2017, Mr. Lehmann got employed by PLC2 GmbH as a developer and trainer.

Jim Lewis

SynthWorks Design Inc.

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Jim Lewis has over 30 years of design and teaching experience and is well known within the VHDL community. He is the Chair of the IEEE 1076 VHDL Standards Working Group. He is a co-founder of the Open Source VHDL Verification Methodology (OSVVM) and the chief architect of the packages and methodology. He is an expert VHDL trainer for SynthWorks Design Inc. In his design practice, he has created designs for print servers, networking, fighter jets, video phones, and space craft.

Philippe Manet

Embedded Computing Specialists Sprl

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Embedded Computing Specialists Sprl

Christian Michel

Lattice

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Christian Michel is a Senior Field Application Engineer at Lattice Semiconductor. Based out of the Company's German office, Mr. Michel supports Lattice's low power, low cost and small form factor FPGA solutions and works closely with customers throughout Europe. Mr. Michel is a seasoned engineer with over 25 years of experience in ASIC and FPGA technologies.

Baruch Mitsengendler

The MathWorks GmbH

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Baruch works with MathWorks, Germany since October 2016 as a senior application engineer. His main functions include responsibility for HDL code generation and verification tools. Prior to joining MathWorks, Baruch was working as an ASIC design and verification engineer, both in Israel and Germany. His main working focus was wireline communication systems as well as memory products. Baruch has a B.Sc. degree in Electrical Engineering from the Technion, Israel Institute of Technology.

Prof. Dr. Bernhard Nebel

Universität Freiburg

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Bernhard Nebel is a professor at Albert-Ludwigs-Universität Freiburg. He does research in Artificial Intelligence since almost 40 years. Some very visible research results are an autonomous football table and winning the international RoboCup robotic soccer competition three times. He is a fellow of the international AI organizations EurAI and AAAI and he is an elected member of the German national academy of science Leopoldina. In 2019, he was selected as one of the 10 most influential researchers of AI in Germany by the German Informatics Society (GI).

Maximilian Odendahl

Silexica GmbH

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Maximilian Odendahl is on a mission to democratize accelerated computing, enabling intelligent electronic products of the future. He is the CEO and co-founder of Silexica and has built the company from its beginning in 2014 to become a global leader in software design automation for heterogeneous computing. Silexica now has a team of 60 people and has raised $28m from leading international VCs. He was selected as Germany's Top 40 under 40 in 2019. Max received a Computer Engineering diploma from RWTH Aachen University in 2010 and was formerly the Chief Engineer of the Chair for Software for Systems on Silicon leading 15 research assistants. His work has been published in over 20 publications in international computing conferences and journals.

Giuseppe Privitera

Intel Deutschland GmbH

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Giuseppe serves as Business development for EMEA and North America for Intel Enpirion Power Solution BU inside PSG. His focus are customers, establishing and maintaining effective relationships he earns their trust taking care of every aspect of the relationship to deliver the best possible experience. He joined Intel in 2016 and prior to it he served in the semiconductor supplier’s space covering many positions as Application Manager, Product Marketing manager and Business Development. His technical experience spans in the fields of Analog, Power and Mixed Signals ICs. Giuseppe received his master’s degree in Electronic Engineering at University of Catania (Italy) and he is currently enrolled in the Executive MBA 2021 at IESE Business School in Munich. In his free time Giuseppe likes to spend time with his family and friends cooking his special low ’n slow Texan style BBQ.

Saad Qazi

EBV Elektronik GmbH & Co. KG

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Saad Qazi has a passion for hardware development and FPGAs. Before joining EBV Elektronik GmbH as a Field Application Engineer in 2019, he worked on Hardware development at Denso Automotive and Bosch. He has previous experience with microprocessor design and implementing AI algorithms on FPGAs. Currently, Saad supports many customers across Southern Germany and Austria with organizational, technical, and design issues related to the Xilinx and Microchip FPGAs.

Calista Redmond

RISC-V Foundation

Gerhard Risse

Arrow - Micron Semiconductor (Deutschland) GmbH

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After finishing his studies after 9 semesters in Electrical Engineering at the Technical University of Karlsruhe, Gerhard went to Brazil to design SDH Telecom Equipment. Back in Germany, worked as Field Application Engineer in industrial network companies such as Moxa and semiconductor companies such as Intel, Infineon and finally Micron. Gerhard got 15 patents granted mainly in memory technology and network technology.

Dr. Oleg Rudakov

PLC2 GmbH

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Oleg has started with ASIC and FPGA design EDA in 1995. He has successfully completed Ph.D. thesis on special sensitivity analysis of testability of analog ASICs using artificial intelligence methods in 1999. Since 2000 Oleg worked as RTL verification engineer, designer, project lead, technical manager for world-know semiconductor companies. His technical and business knowledge are now available as he holds a position of a trainer/designer at PLC2 GmbH. Oleg specializes in hardware systems architecture and production using Xilinx and Lattice devices. The Oleg’s presentation will give you a real-life example of the multiple external clocks switching and RTL code unification for ASIC/FPGA product development.

Naveed Sherwani

SiFive

Prof.-Dr. Christian Siemers

TU Clausthal

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Christian Siemers was born in Kiel in 1954. He completed his studies in physics and mathematics at the Christian-Albrechts-University of Kiel and graduated in 1981 with a diploma in physics and in 1984 with a doctorate in natural sciences. He then worked for Siemens Daten- und Kommunikationstechnik in Munich, and in 1989 he moved to Dräger Medizintechnik, Lübeck. Seit 1993 arbeitet er als Professor für Technische Informatik, zunächst an der Fachhochschule Stralsund (bis 1995), danach an der Fachhochschule Westküste in Heide/Holstein (bis 2001). Seit 2002 ist er an der Hochschule Nordhausen, seit 2008 auch an der Technische Universität Clausthal tätig. Dort vertritt er die Professur für Automatisierungstechnik (zu 50%). Seine Hauptinteressen gelten einerseits programmierbaren Systemarchitekturen, spezifisch Mikroprozessoren und programmierbaren Logikbausteinen sowie allen Übergangsformen, andererseits dem Hardware/Software-Interface, den Konzepten zur Programmentwicklung und den Programmiersprachen. Aktuelle Themen sind Transcodierung zwischen Programmiersprachen, schnelle Echtzeitsysteme sowie In-Situ-Monitoring (Fehlerdetektierung zur Laufzeit).

Ted Speers

Microchip

Giulio Spinelli

Avnet EMG Italy Srl (Silica)

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Business Development and Technology Specialist for Sensing and Timing EMEA Based in Milano , Italy. Giulio brings decades years of successful experiences at European level in Sales, Application, R&D and Team Management

Jens Stapelfeldt

Xilinx

Espen Tallaksen

Bitvis AS

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Espen Tallaksen is the managing director and founder of Bitvis, an independent design centre for embedded software and FPGA. He graduated from the University of Glasgow (Scotland) in 1987 and has 30 years’ experience with FPGA and ASIC development from Philips Semiconductors in Switzerland and various companies in Norway, including his earlier founded company Digitas. During twenty years Espen has had a special interest for methodology cultivation and pragmatic efficiency and quality improvement. One result of this interest is the UVVM verification platform that is currently being used by companies world-wide. He has given many presentations and keynotes on various technical aspects of FPGA development. He is also giving courses on how to design and verify FPGAs more efficiently and with a better quality. 'Advanced VHDL Verification – Made Simple ' (3 days) and 'Accelerating FPGA design' (2 days) are both arranged in Germany in cooperation with Trias Mikroelektronik. Espen also had a hands-on tutorial and two presentations at FPGA-Kongress in 2016; - both of them with a crowded audience and great feedback on the interesting technical contents.

David Thomas

Lattice Semiconductor

Stefan Unrein

PLC2 GmbH

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Stefan has studied Electrical Engineering/ Information Technology in University of applied Science Offenburg. In his Master Thesis at PLC2 GmbH he created a high-speed UDP-Ethernet IP Core. After his Thesis he stayed at PLC2 and is here working as FPGA Developer specialized in Multi-Gigabit Transceivers and High-Speed Protocols like PCIe and Multigigabit Ethernet. Since then he had the technical project lead for several Customer projects.

Prof. Dr. Stefan Wallentowitz

TU Munich

Ronald Weber

CADFEM GmbH

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Seit mehr als 25 Jahren im Bereich des PCB Layouts in der Dienstleistung tätig. Mehrjährige Stationen bei IBM, Intel, Infineon. Die letzten 7 Jahre hauptsächlich im Bereich Simulation und Messung von Signal und Power Integrität. Seit 2,5 Jahren bei CADFEM als „Begeisterer“ für Simulation

Ernst Wehlage

PLC2 GmbH

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After graduating from university, Ernst Wehlage started in Darmstadt in the digital development of professional video systems for the future HDTV technology. In complex systems, FPGA technologies were used early on to achieve the high data rates. These technologies were decisive for the development of new innovative film and video systems in high-resolution real-time processing. With now 29 years of professional experience in training and application of programmable logic, the fascination of these possibilities is unbroken, as continuously innovative technology leaps provide hardware developers and now also software developers with ever better methods. Since 2001 he has been a member of the PLC2 team and has been a speaker on almost all topics of PLC2 training courses, designs FPGA-based systems for customers and advises developers on how to solve their development tasks.

Jakob Winkler

Silicon Austria Labs GmbH

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Silicon Austria Labs GmbH

Dr. Jürgen Wolde

Ingenieurbüro Wolde

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Jürgen Wolde studied Theoretical Electrical Engineering at today's Technical University of Ilmenau and graduated as Dipl.-Ing. in 1984. In 1989, he received his doctorate in the field of electromagnetic compatibility at today's University of Applied Sciences in Mittweida. The field of activity ranged from ASIC design for products, to component design and complex research patterns in which FPGA-based circuit boards with 10Gbit/s interfaces were used. Collaboration in various studies and research projects up to 100 Gbit/s as well as management activities completed the range of applications.

Dr.- Ing. Steffen Zimmermann

PLC2 GmbH

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Steffen looks back on a 23 year career in Consumer and Avionics industries from sensor signal processing hardware and software development to management in engineering and certification of Avionics products. He joined PLC Design GmbH as general manager due to the excellent cooperation he experienced with Eugen Krassin’s PLC2 during two DO254 DAL-C and DAL-A certification projects involving FPGAs for complex signal processing in digital sensor control loops. He knows the inherent conflicts between the goals of quick development towards a “functional” solution and the development process required to develop a functionally safe hardware design. Steffen’s part of the presentation will give hints on DO254 standard reading and he will describe how the DO254 standard can be adopted by engineers as a truly helpful resource to develop a functionally safe product.

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